1. Field of the Invention
The present invention relates generally to the conversion of digital data to analog data. More specifically, the present invention relates to the use of finite impulse response (FIR) filters in audio/voice digital-to-analog converters (DACs).
2. Related Art
Analog FIR filters are extensively used in conventional audio/voice DACs. These FIR based DACs are used, for example, as front-ends in signal processing systems where high-quality audio or voice is a desirable output. Additionally, wireless communication systems, such as the European-based Group Speciale Mobile (GSM) and the US based Code Division Multiple Access (CDMA) both widely use FIR based signal processing systems.
Conventional FIR-based DACs can include, for example, a sigma-delta (Σ-Δ) modulator, an analog FIR filter, and a switched capacitor filter. In these traditional DACs, the modulator, the analog FIR filter, and the switched capacitor filter all operate at the same sampling frequency (FS). In these conventional systems, the Σ-Δmodulator is considered in the art as the system's digital processing portion. Conversely, the analog filter and the switched capacitor filter are collectively considered to be the system's analog processing portion.
More advanced DACs include an additional processing feature. In the advanced DACs, for example, the analog filter operates at one-half the sampling rate of the digital portion to ease the settling time requirement to the analog filter. Settling time is defined as the time required to settle to some specific percent (e.g. 99%) of the final value. In addition to the Σ-Δ modulator, the advanced DACs can also include a multi-tap digital filter to facilitate the additional processing features. These more advanced conventional DACs, however, are inefficient from a hardware perspective. That is, many of these conventional advanced DACs include many other hardware support components that help enable the analog portion to operate at a slower sampling rate than the digital portion.
What is needed, therefore, is a more efficient approach to implement the digital portion of DACs in order to enable the analog processing portion to operate at a slower sampling rate.